Mesa formation for wafer-to-wafer bonding

ABSTRACT

Disclosed herein are techniques for wafer-to-wafer bonding for manufacturing light emitting diodes (LEDs). In some embodiments, a method of manufacturing LEDs includes etching a semiconductor material to form a plurality of adjacent mesa shapes. The semiconductor material includes one or more epitaxial layers. The method also includes forming a passivation layer to fill gaps between the adjacent mesa shapes, planarizing the passivation layer to expose a contact layer formed on a first surface of the semiconductor material, and bonding a base wafer to the contact layer.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. Non-Provisional applicationSer. No. 16/436,794, filed Jun. 10, 2019 which claims priority under 35U.S.C. § 119 to U.S. Provisional Patent Application No. 62/729,820,filed on Sep. 11, 2018, the contents of which are hereby incorporated byreference in their entirety.

BACKGROUND

Light emitting diodes (LEDs) convert electrical energy into opticalenergy. In semiconductor LEDs, light is usually generated throughrecombination of electrons and holes within a semiconductor layer. Achallenge in the field of LEDs is to extract as much of the emittedlight as possible toward the desired direction. Various approaches maybe used to increase the efficiency of an LED, such as adjusting theshape of the semiconductor layer, roughening the surface of thesemiconductor layer, and using additional optics to redirect or focusthe light.

SUMMARY

LEDs may be formed in a one-dimensional array or a two-dimensionalarray. Various manufacturing methods may be used, such as wafer-to-waferbonding or pick-and-place techniques. In wafer-to-wafer bonding, an LEDwafer having epitaxial layers may be flip-chip bonded to a base waferhaving a driver circuit. After the two wafers have been bonded, theindividual LEDs are singulated. Wafer-to-wafer bonding allows smallerLEDs to be manufactured than pick-and-place techniques, because it isunnecessary to pick, place, and bond individual LEDs. For example, LEDshaving a chip diameter down to 1 μm can be manufactured withwafer-to-wafer bonding. However, related art wafer-to-wafer bondingmethods may suffer from low light extraction efficiency.

The present disclosure generally relates to wafer-to-wafer bonding formanufacturing LEDs. In some embodiments, a method of manufacturing LEDsincludes etching a semiconductor material to form a plurality ofadjacent mesa shapes. The semiconductor material includes one or moreepitaxial layers. The method also includes forming a passivation layerwithin gaps between the adjacent mesa shapes, and bonding a base waferto a first surface of the semiconductor material.

The method may also include removing a substrate from a second surfaceof the semiconductor material, wherein the second surface of thesemiconductor material is opposite to the first surface of thesemiconductor material, and patterning a trench between each pair of theadjacent mesa shapes to form a plurality of LEDs. The method may alsoinclude forming a lens on a portion of the second surface of thesemiconductor material corresponding to one of the plurality of LEDs.Alternatively or in addition, the method may include forming a structureof the second surface of the semiconductor material to enhance aspontaneous emission rate, wherein the structure corresponds to one ofthe plurality of LEDs.

Alternatively or in addition, the method may also include forming afirst contact on the semiconductor material, wherein the first contacthas a first polarity, and the first contact is formed before or afterthe plurality of adjacent mesa shapes are formed. The method may alsoinclude forming a second contact, wherein the second contact has asecond polarity that is opposite to the first polarity of the firstcontact. The second contact may be a distributed contact and/or a largearea contact.

Alternatively or in addition, the method may also include, beforebonding the base wafer to the first surface of the semiconductormaterial, planarizing the first surface of the semiconductor materialand the passivation layer, and depositing a bonding layer on the firstsurface of the semiconductor material, wherein the base wafer is bondedto the first surface of the semiconductor material via the bondinglayer. The base layer may be bonded to the bonding layer bymetal-to-metal bonding. Alternatively or in addition, the base layer maybe bonded to the bonding layer by eutectic bonding. Alternatively or inaddition, the base layer may be bonded to the bonding layer by oxidebonding. Alternatively or in addition, the base layer may be bonded tothe bonding layer by anodic bonding, thermocompression bonding,ultraviolet bonding, and/or fusion bonding.

Alternatively or in addition, the method may also include, beforeforming the passivation layer within gaps between the adjacent mesashapes, depositing a reflective layer on a side wall of each of theadjacent mesa shapes. Alternatively or in addition, the method may alsoinclude, before bonding the base wafer to the first surface of thesemiconductor material, depositing a contact layer on the first surfaceof the semiconductor material and the passivation layer, and depositinga bonding layer on the contact layer. The base wafer may be bonded tothe first surface of the semiconductor material via the contact layerand the bonding layer. The bonding layer and the contact layer made bemade of different metals or the same metal.

The semiconductor material may include, in order, an n-type layer, aquantum well layer, and a p-type layer. Each of the adjacent mesa shapesmay have non-vertical side walls. For example, each of the adjacent mesashapes may have a parabolic shape. The base wafer may include aplurality of driver circuits, and the method may also include aligningthe plurality of driver circuits with the adjacent mesa shapes whilebonding the base wafer to the first surface of the semiconductormaterial.

The method may also include roughening a portion of the second surfaceof the semiconductor material corresponding to one of the plurality ofLEDs. The substrate may be removed by focusing a laser beam at aninterface between the substrate and the semiconductor material. Thetrenches may be patterned by lithography.

This summary is neither intended to identify key or essential featuresof the claimed subject matter, nor is it intended to be used inisolation to determine the scope of the claimed subject matter. Thesubject matter should be understood by reference to appropriate portionsof the entire specification of this disclosure, any or all drawings, andeach claim. The foregoing, together with other features and examples,will be described in more detail below in the following specification,claims, and accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

Illustrative embodiments are described in detail below with reference tothe following figures:

FIG. 1 is a simplified block diagram of an example artificial realitysystem environment including a near-eye display, according to certainembodiments;

FIG. 2 is a perspective view of a simplified example near-eye displayincluding various sensors;

FIG. 3 is a perspective view of an example near-eye display in the formof a head-mounted display (HMD) device for implementing some of theexamples disclosed herein; and

FIG. 4 is a simplified block diagram of an example electronic system ofan example near-eye display for implementing some of the examplesdisclosed herein;

FIGS. 5A-5F illustrate a method of wafer-to-wafer bonding formanufacturing LEDs;

FIGS. 6A-6J illustrate another method of wafer-to-wafer bonding formanufacturing LEDs;

FIGS. 7A-7G illustrate yet another method of wafer-to-wafer bonding formanufacturing LEDs;

FIGS. 8A-8C illustrate various methods of bonding a base wafer to asemiconductor wafer; and

FIGS. 9A-9D illustrate a method of forming a surface for wafer-to-waferbonding.

DETAILED DESCRIPTION

In the following description, for the purposes of explanation, specificdetails are set forth in order to provide a thorough understanding ofexamples of the disclosure. However, it will be apparent that variousexamples may be practiced without these specific details. For example,devices, systems, structures, assemblies, methods, and other componentsmay be shown as components in block diagram form in order not to obscurethe examples in unnecessary detail. In other instances, well-knowndevices, processes, systems, structures, and techniques may be shownwithout necessary detail in order to avoid obscuring the examples. Thefigures and description are not intended to be restrictive. The termsand expressions that have been employed in this disclosure are used asterms of description and not of limitation, and there is no intention inthe use of such terms and expressions of excluding any equivalents ofthe features shown and described or portions thereof.

As used herein, visible light may refer to light with a wavelengthbetween about 400 nm and about 750 nm. Near infrared (NIR) light mayrefer to light with a wavelength between about 750 nm and about 2500 nm.The desired infrared (IR) wavelength range may refer to the wavelengthrange of IR light that can be detected by a suitable IR sensor (e.g., acomplementary metal-oxide semiconductor (CMOS) or a charge-coupleddevice (CCD) sensor), such as between 830 nm and 860 nm or between 930nm and 980 nm.

As also used herein, a substrate may refer to a medium within which anarray of chirped gratings may be inscribed. A chirped grating may referto a grating whose pitch and angle of orientation changes over theextent of the grating. The substrate may include one or more types ofdielectric materials, such as glass, quartz, plastic, polymer,poly(methyl methacrylate) (PMMA), crystal, or ceramic. At least one typeof material of the substrate may be transparent to visible light and NIRlight. A thickness of the substrate may range from, for example, lessthan about 1 mm to less than about 10 mm. As used herein, a material maybe “transparent” to a light beam if the light beam can pass through thematerial with a high transmission rate, such as larger than 60%, 75%,80%, 90%, 95%, 98%, 99%, or higher, where a small portion of the lightbeam (e.g., less than 40%, 25%, 20%, 10%, 5%, 2%, 1%, or less) may bescattered, reflected, or absorbed by the material. The transmission rate(i.e., transmissivity) may be represented by either a photopicallyweighted or an unweighted average transmission rate over a range ofwavelengths, or the lowest transmission rate over a range ofwavelengths, such as the visible wavelength range. Alternatively, asubstrate may refer to a medium that is suitable for growing asemiconductor material. For example, the substrate may be made ofsapphire, and the semiconductor material may be made of GaN. Othernon-limiting examples of materials that may be used for the substrateinclude GaN, silicon, SiC, GaAs, and GaP.

An artificial reality system, such as a virtual reality (VR), augmentedreality (AR), or mixed reality (MR) system, may include a near-eyedisplay (e.g., a headset or a pair of glasses) configured to presentcontent to a user via an electronic or optic display and, in some cases,may also include a console configured to generate content forpresentation to the user and to provide the generated content to thenear-eye display for presentation. To improve user interaction withpresented content, the console may modify or generate content based on alocation where the user is looking, which may be determined by trackingthe user's eye. Tracking the eye may include tracking the positionand/or shape of the pupil of the eye, and/or the rotational position(gaze direction) of the eye. To track the eye, the near-eye display mayilluminate a surface of the user's eye using light sources mounted to orwithin the near-eye display, according to at least one embodiment. Animaging device (e.g., a camera) included in the vicinity of the near-eyedisplay may then capture light reflected by various surfaces of theuser's eye. Light that is reflected specularly off the cornea of theuser's eye may result in “glints” in the captured image. One way toilluminate the eye to see the pupil as well as the glints is to use atwo-dimensional (2D) array of light-emitting diodes (LEDs). Techniquessuch as a centroiding algorithm may be used to accurately determine thelocations of the glints on the eye in the captured image, and therotational position (e.g., the gaze direction) of the eye may then bedetermined based on the locations of the glints relative to a knownfeature of the eye (e.g., the center of the pupil) within the capturedimage.

FIG. 1 is a simplified block diagram of an example artificial realitysystem environment 100 including a near-eye display 120, in accordancewith certain embodiments. Artificial reality system environment 100shown in FIG. 1 may include a near-eye display 120, an external imagingdevice 150, and an input/output interface 140 that are each coupled to aconsole 110. While FIG. 1 shows example artificial reality systemenvironment 100 including one near-eye display 120, one external imagingdevice 150, and one input/output interface 140, any number of thesecomponents may be included in artificial reality system environment 100,or any of the components may be omitted. For example, there may bemultiple near-eye displays 120 monitored by one or more external imagingdevices 150 in communication with console 110. In alternativeconfigurations, different or additional components may be included inartificial reality system environment 100.

Near-eye display 120 may be a head-mounted display that presents contentto a user. Examples of content presented by near-eye display 120 includeone or more of images, videos, audios, or some combination thereof. Insome embodiments, audio may be presented via an external device (e.g.,speakers and/or headphones) that receives audio information fromnear-eye display 120, console 110, or both, and presents audio databased on the audio information. Near-eye display 120 may include one ormore rigid bodies, which may be rigidly or non-rigidly coupled to eachother. A rigid coupling between rigid bodies may cause the coupled rigidbodies to act as a single rigid entity. A non-rigid coupling betweenrigid bodies may allow the rigid bodies to move relative to each other.In various embodiments, near-eye display 120 may be implemented in anysuitable form factor, including a pair of glasses. Additionally, invarious embodiments, the functionality described herein may be used in aheadset that combines images of an environment external to near-eyedisplay 120 and content received from console 110, or from any otherconsole generating and providing content to a user. Therefore, near-eyedisplay 120, and methods for eye tracking described herein, may augmentimages of a physical, real-world environment external to near-eyedisplay 120 with generated content (e.g., images, video, sound, etc.) topresent an augmented reality to a user.

In various embodiments, near-eye display 120 may include one or more ofdisplay electronics 122, display optics 124, one or more locators 126,one or more position sensors 128, an eye-tracking unit 130, and aninertial measurement unit (IMU) 132. Near-eye display 120 may omit anyof these elements or include additional elements in various embodiments.Additionally, in some embodiments, near-eye display 120 may includeelements combining the function of various elements described inconjunction with FIG. 1.

Display electronics 122 may display images to the user according to datareceived from console 110. In various embodiments, display electronics122 may include one or more display panels, such as a liquid crystaldisplay (LCD), an organic light emitting diode (OLED) display, amicro-LED display, an active-matrix OLED display (AMOLED), a transparentOLED display (TOLED), or some other display. For example, in oneimplementation of near-eye display 120, display electronics 122 mayinclude a front TOLED panel, a rear display panel, and an opticalcomponent (e.g., an attenuator, polarizer, or diffractive or spectralfilm) between the front and rear display panels. Display electronics 122may include sub-pixels to emit light of a predominant color such as red,green, blue, white, or yellow. In some implementations, displayelectronics 122 may display a 3D image through stereo effects producedby two-dimensional panels to create a subjective perception of imagedepth. For example, display electronics 122 may include a left displayand a right display positioned in front of a user's left eye and righteye, respectively. The left and right displays may present copies of animage shifted horizontally relative to each other to create astereoscopic effect (i.e., a perception of image depth by a user viewingthe image).

In certain embodiments, display optics 124 may display image contentoptically (e.g., using optical waveguides and couplers), or magnifyimage light received from display electronics 122, correct opticalerrors associated with the image light, and present the corrected imagelight to a user of near-eye display 120. In various embodiments, displayoptics 124 may include one or more optical elements. Example opticalelements may include a substrate, optical waveguides, an aperture, aFresnel lens, a convex lens, a concave lens, a filter, or any othersuitable optical element that may affect image light emitted fromdisplay electronics 122. Display optics 124 may include a combination ofdifferent optical elements as well as mechanical couplings to maintainrelative spacing and orientation of the optical elements in thecombination. One or more optical elements in display optics 124 may havean optical coating, such as an anti-reflective coating, a reflectivecoating, a filtering coating, or a combination of different opticalcoatings.

Magnification of the image light by display optics 124 may allow displayelectronics 122 to be physically smaller, weigh less, and consume lesspower than larger displays. Additionally, magnification may increase afield of view of the displayed content. In some embodiments, displayoptics 124 may have an effective focal length larger than the spacingbetween display optics 124 and display electronics 122 to magnify imagelight projected by display electronics 122. The amount of magnificationof image light by display optics 124 may be adjusted by adding orremoving optical elements from display optics 124.

Display optics 124 may be designed to correct one or more types ofoptical errors, such as two-dimensional optical errors,three-dimensional optical errors, or a combination thereof.Two-dimensional errors may include optical aberrations that occur in twodimensions. Example types of two-dimensional errors may include barreldistortion, pincushion distortion, longitudinal chromatic aberration,and transverse chromatic aberration. Three-dimensional errors mayinclude optical errors that occur in three dimensions. Example types ofthree-dimensional errors may include spherical aberration, comaticaberration, field curvature, and astigmatism. In some embodiments,content provided to display electronics 122 for display may bepre-distorted, and display optics 124 may correct the distortion when itreceives image light from display electronics 122 generated based on thepre-distorted content.

Locators 126 may be objects located in specific positions on near-eyedisplay 120 relative to one another and relative to a reference point onnear-eye display 120. Console 110 may identify locators 126 in imagescaptured by external imaging device 150 to determine the artificialreality headset's position, orientation, or both. A locator 126 may be alight emitting diode (LED), a corner cube reflector, a reflectivemarker, a type of light source that contrasts with an environment inwhich near-eye display 120 operates, or some combinations thereof. Inembodiments where locators 126 are active components (e.g., LEDs orother types of light emitting devices), locators 126 may emit light inthe visible band (e.g., about 380 nm to 750 nm), in the infrared (IR)band (e.g., about 750 nm to 1 mm), in the ultraviolet band (e.g., about10 nm to about 380 nm), in another portion of the electromagneticspectrum, or in any combination of portions of the electromagneticspectrum.

In some embodiments, locators 126 may be located beneath an outersurface of near-eye display 120. A portion of near-eye display 120between a locator 126 and an entity external to near-eye display 120(e.g., external imaging device 150, a user viewing the outer surface ofnear-eye display 120) may be transparent to the wavelengths of lightemitted or reflected by locators 126 or is thin enough to notsubstantially attenuate the light emitted or reflected by locators 126.In some embodiments, the outer surface or other portions of near-eyedisplay 120 may be opaque in the visible band, but is transparent in theIR band, and locators 126 may be under the outer surface and may emitlight in the IR band.

External imaging device 150 may generate slow calibration data based oncalibration parameters received from console 110. Slow calibration datamay include one or more images showing observed positions of locators126 that are detectable by external imaging device 150. External imagingdevice 150 may include one or more cameras, one or more video cameras,any other device capable of capturing images including one or more oflocators 126, or some combinations thereof. Additionally, externalimaging device 150 may include one or more filters (e.g., to increasesignal to noise ratio). External imaging device 150 may be configured todetect light emitted or reflected from locators 126 in a field of viewof external imaging device 150. In embodiments where locators 126include passive elements (e.g., retroreflectors), external imagingdevice 150 may include a light source that illuminates some or all oflocators 126, which may retro-reflect the light to the light source inexternal imaging device 150. Slow calibration data may be communicatedfrom external imaging device 150 to console 110, and external imagingdevice 150 may receive one or more calibration parameters from console110 to adjust one or more imaging parameters (e.g., focal length, focus,frame rate, sensor temperature, shutter speed, aperture, etc.).

Position sensors 128 may generate one or more measurement signals inresponse to motion of near-eye display 120. Examples of position sensors128 may include accelerometers, gyroscopes, magnetometers, othermotion-detecting or error-correcting sensors, or some combinationsthereof. For example, in some embodiments, position sensors 128 mayinclude multiple accelerometers to measure translational motion (e.g.,forward/back, up/down, or left/right) and multiple gyroscopes to measurerotational motion (e.g., pitch, yaw, or roll). In some embodiments,various position sensors may be oriented orthogonally to each other.

IMU 132 may be an electronic device that generates fast calibration databased on measurement signals received from one or more of positionsensors 128. Position sensors 128 may be located external to IMU 132,internal to IMU 132, or some combination thereof. Based on the one ormore measurement signals from one or more position sensors 128, IMU 132may generate fast calibration data indicating an estimated position ofnear-eye display 120 relative to an initial position of near-eye display120. For example, IMU 132 may integrate measurement signals receivedfrom accelerometers over time to estimate a velocity vector andintegrate the velocity vector over time to determine an estimatedposition of a reference point on near-eye display 120. Alternatively,IMU 132 may provide the sampled measurement signals to console 110,which may determine the fast calibration data. While the reference pointmay generally be defined as a point in space, in various embodiments,the reference point may also be defined as a point within near-eyedisplay 120 (e.g., a center of IMU 132).

Eye-tracking unit 130 may include one or more imaging devices configuredto capture eye tracking data, which an eye-tracking module 118 inconsole 110 may use to track the user's eye. Eye tracking data may referto data output by eye-tracking unit 130. Example eye tracking data mayinclude images captured by eye-tracking unit 130 or information derivedfrom the images captured by eye-tracking unit 130. Eye tracking mayrefer to determining an eye's position, including orientation andlocation of the eye, relative to near-eye display 120. For example,eye-tracking module 118 may output the eye's pitch and yaw based onimages of the eye captured by eye-tracking unit 130. In variousembodiments, eye-tracking unit 130 may measure electromagnetic energyreflected by the eye and communicate the measured electromagnetic energyto eye-tracking module 118, which may then determine the eye's positionbased on the measured electromagnetic energy. For example, eye-trackingunit 130 may measure electromagnetic waves such as visible light,infrared light, radio waves, microwaves, waves in any other part of theelectromagnetic spectrum, or a combination thereof reflected by an eyeof a user.

Eye-tracking unit 130 may include one or more eye-tracking systems. Aneye-tracking system may include an imaging system to image one or moreeyes and may optionally include a light emitter, which may generatelight that is directed to an eye such that light reflected by the eyemay be captured by the imaging system. For example, eye-tracking unit130 may include a coherent light source (e.g., a VCSEL) emitting lightin the visible spectrum or infrared spectrum, and a camera capturing thelight reflected by the user's eye. As another example, eye-tracking unit130 may capture reflected radio waves emitted by a miniature radar unit.Eye-tracking unit 130 may use low-power light emitters that emit lightat frequencies and intensities that would not injure the eye or causephysical discomfort. Eye-tracking unit 130 may be arranged to increasecontrast in images of an eye captured by eye-tracking unit 130 whilereducing the overall power consumed by eye-tracking unit 130 (e.g.,reducing power consumed by a light emitter and an imaging systemincluded in eye-tracking unit 130). For example, in someimplementations, eye-tracking unit 130 may consume less than 100milliwatts of power.

In some embodiments, eye-tracking unit 130 may include one light emitterand one camera to track each of the user's eyes. In other embodiments,eye-tracking unit 130 may include a plurality of light emitters and onecamera to track each of the user's eyes. Eye-tracking unit 130 may alsoinclude different eye-tracking systems that operate together to provideimproved eye tracking accuracy and responsiveness. For example,eye-tracking unit 130 may include a fast eye-tracking system with a fastresponse time and a slow eye-tracking system with a slower responsetime. The fast eye-tracking system may frequently measure an eye tocapture data used by eye-tracking module 118 to determine the eye'sposition relative to a reference eye position. The slow eye-trackingsystem may independently measure the eye to capture data used byeye-tracking module 118 to determine the reference eye position withoutreference to a previously determined eye position. Data captured by theslow eye-tracking system may allow eye-tracking module 118 to determinethe reference eye position with greater accuracy than the eye's positiondetermined from data captured by the fast eye-tracking system. Invarious embodiments, the slow eye-tracking system may provideeye-tracking data to eye-tracking module 118 at a lower frequency thanthe fast eye-tracking system. For example, the slow eye-tracking systemmay operate less frequently or have a slower response time to conservepower.

Eye-tracking unit 130 may be configured to estimate the orientation ofthe user's eye. The orientation of the eye may correspond to thedirection of the user's gaze within near-eye display 120. Theorientation of the user's eye may be defined as the direction of thefoveal axis, which is the axis between the fovea (an area on the retinaof the eye with the highest concentration of photoreceptors) and thecenter of the eye's pupil. In general, when a user's eyes are fixed on apoint, the foveal axes of the user's eyes intersect that point. Thepupillary axis of an eye may be defined as the axis that passes throughthe center of the pupil and is perpendicular to the corneal surface. Ingeneral, even though the pupillary axis and the foveal axis intersect atthe center of the pupil, the pupillary axis may not directly align withthe foveal axis. For example, the orientation of the foveal axis may beoffset from the pupillary axis by approximately −1° to 8° laterally andabout ±4° vertically. Because the foveal axis is defined according tothe fovea, which is located in the back of the eye, the foveal axis maybe difficult or impossible to measure directly in some eye trackingembodiments. Accordingly, in some embodiments, the orientation of thepupillary axis may be detected and the foveal axis may be estimatedbased on the detected pupillary axis.

In general, the movement of an eye corresponds not only to an angularrotation of the eye, but also to a translation of the eye, a change inthe torsion of the eye, and/or a change in the shape of the eye.Eye-tracking unit 130 may also be configured to detect the translationof the eye, which may be a change in the position of the eye relative tothe eye socket. In some embodiments, the translation of the eye may notbe detected directly, but may be approximated based on a mapping from adetected angular orientation. Translation of the eye corresponding to achange in the eye's position relative to the eye-tracking unit may alsobe detected. Translation of this type may occur, for example, due to ashift in the position of near-eye display 120 on a user's head.Eye-tracking unit 130 may also detect the torsion of the eye and therotation of the eye about the pupillary axis. Eye-tracking unit 130 mayuse the detected torsion of the eye to estimate the orientation of thefoveal axis from the pupillary axis. Eye-tracking unit 130 may alsotrack a change in the shape of the eye, which may be approximated as askew or scaling linear transform or a twisting distortion (e.g., due totorsional deformation). Eye-tracking unit 130 may estimate the fovealaxis based on some combinations of the angular orientation of thepupillary axis, the translation of the eye, the torsion of the eye, andthe current shape of the eye.

In some embodiments, eye-tracking unit 130 may include multiple emittersor at least one emitter that can project a structured light pattern onall portions or a portion of the eye. The structured light pattern maybe distorted due to the shape of the eye when viewed from an offsetangle. Eye-tracking unit 130 may also include at least one camera thatmay detect the distortions (if any) of the structured light patternprojected onto the eye. The camera may be oriented on a different axisto the eye than the emitter. By detecting the deformation of thestructured light pattern on the surface of the eye, eye-tracking unit130 may determine the shape of the portion of the eye being illuminatedby the structured light pattern. Therefore, the captured distorted lightpattern may be indicative of the 3D shape of the illuminated portion ofthe eye. The orientation of the eye may thus be derived from the 3Dshape of the illuminated portion of the eye. Eye-tracking unit 130 canalso estimate the pupillary axis, the translation of the eye, thetorsion of the eye, and the current shape of the eye based on the imageof the distorted structured light pattern captured by the camera.

Near-eye display 120 may use the orientation of the eye to, e.g.,determine an inter-pupillary distance (IPD) of the user, determine gazedirection, introduce depth cues (e.g., blur image outside of the user'smain line of sight), collect heuristics on the user interaction in theVR media (e.g., time spent on any particular subject, object, or frameas a function of exposed stimuli), some other functions that are basedin part on the orientation of at least one of the user's eyes, or somecombination thereof. Because the orientation may be determined for botheyes of the user, eye-tracking unit 130 may be able to determine wherethe user is looking. For example, determining a direction of a user'sgaze may include determining a point of convergence based on thedetermined orientations of the user's left and right eyes. A point ofconvergence may be the point where the two foveal axes of the user'seyes intersect (or the nearest point between the two axes). Thedirection of the user's gaze may be the direction of a line passingthrough the point of convergence and the mid-point between the pupils ofthe user's eyes.

Input/output interface 140 may be a device that allows a user to sendaction requests to console 110. An action request may be a request toperform a particular action. For example, an action request may be tostart or to end an application or to perform a particular action withinthe application. Input/output interface 140 may include one or moreinput devices. Example input devices may include a keyboard, a mouse, agame controller, a glove, a button, a touch screen, or any othersuitable device for receiving action requests and communicating thereceived action requests to console 110. An action request received bythe input/output interface 140 may be communicated to console 110, whichmay perform an action corresponding to the requested action. In someembodiments, input/output interface 140 may provide haptic feedback tothe user in accordance with instructions received from console 110. Forexample, input/output interface 140 may provide haptic feedback when anaction request is received, or when console 110 has performed arequested action and communicates instructions to input/output interface140.

Console 110 may provide content to near-eye display 120 for presentationto the user in accordance with information received from one or more ofexternal imaging device 150, near-eye display 120, and input/outputinterface 140. In the example shown in FIG. 1, console 110 may includean application store 112, a headset tracking module 114, a virtualreality engine 116, and eye-tracking module 118. Some embodiments ofconsole 110 may include different or additional modules than thosedescribed in conjunction with FIG. 1. Functions further described belowmay be distributed among components of console 110 in a different mannerthan is described here.

In some embodiments, console 110 may include a processor and anon-transitory computer-readable storage medium storing instructionsexecutable by the processor. The processor may include multipleprocessing units executing instructions in parallel. Thecomputer-readable storage medium may be any memory, such as a hard diskdrive, a removable memory, or a solid-state drive (e.g., flash memory ordynamic random access memory (DRAM)). In various embodiments, themodules of console 110 described in conjunction with FIG. 1 may beencoded as instructions in the non-transitory computer-readable storagemedium that, when executed by the processor, cause the processor toperform the functions further described below.

Application store 112 may store one or more applications for executionby console 110. An application may include a group of instructions that,when executed by a processor, generates content for presentation to theuser. Content generated by an application may be in response to inputsreceived from the user via movement of the user's eyes or inputsreceived from the input/output interface 140. Examples of theapplications may include gaming applications, conferencing applications,video playback application, or other suitable applications.

Headset tracking module 114 may track movements of near-eye display 120using slow calibration information from external imaging device 150. Forexample, headset tracking module 114 may determine positions of areference point of near-eye display 120 using observed locators from theslow calibration information and a model of near-eye display 120.Headset tracking module 114 may also determine positions of a referencepoint of near-eye display 120 using position information from the fastcalibration information. Additionally, in some embodiments, headsettracking module 114 may use portions of the fast calibrationinformation, the slow calibration information, or some combinationthereof, to predict a future location of near-eye display 120. Headsettracking module 114 may provide the estimated or predicted futureposition of near-eye display 120 to VR engine 116.

Headset tracking module 114 may calibrate the artificial reality systemenvironment 100 using one or more calibration parameters, and may adjustone or more calibration parameters to reduce errors in determining theposition of near-eye display 120. For example, headset tracking module114 may adjust the focus of external imaging device 150 to obtain a moreaccurate position for observed locators on near-eye display 120.Moreover, calibration performed by headset tracking module 114 may alsoaccount for information received from IMU 132. Additionally, if trackingof near-eye display 120 is lost (e.g., external imaging device 150 losesline of sight of at least a threshold number of locators 126), headsettracking module 114 may re-calibrate some or all of the calibrationparameters.

VR engine 116 may execute applications within artificial reality systemenvironment 100 and receive position information of near-eye display120, acceleration information of near-eye display 120, velocityinformation of near-eye display 120, predicted future positions ofnear-eye display 120, or some combination thereof from headset trackingmodule 114. VR engine 116 may also receive estimated eye position andorientation information from eye-tracking module 118. Based on thereceived information, VR engine 116 may determine content to provide tonear-eye display 120 for presentation to the user. For example, if thereceived information indicates that the user has looked to the left, VRengine 116 may generate content for near-eye display 120 that mirrorsthe user's eye movement in a virtual environment. Additionally, VRengine 116 may perform an action within an application executing onconsole 110 in response to an action request received from input/outputinterface 140, and provide feedback to the user indicating that theaction has been performed. The feedback may be visual or audiblefeedback via near-eye display 120 or haptic feedback via input/outputinterface 140.

Eye-tracking module 118 may receive eye-tracking data from eye-trackingunit 130 and determine the position of the user's eye based on the eyetracking data. The position of the eye may include an eye's orientation,location, or both relative to near-eye display 120 or any elementthereof. Because the eye's axes of rotation change as a function of theeye's location in its socket, determining the eye's location in itssocket may allow eye-tracking module 118 to more accurately determinethe eye's orientation.

In some embodiments, eye-tracking unit 130 may output eye-tracking dataincluding images of the eye, and eye-tracking module 118 may determinethe eye's position based on the images. For example, eye-tracking module118 may store a mapping between images captured by eye-tracking unit 130and eye positions to determine a reference eye position from an imagecaptured by eye-tracking unit 130. Alternatively or additionally,eye-tracking module 118 may determine an updated eye position relativeto a reference eye position by comparing an image from which thereference eye position is determined to an image from which the updatedeye position is to be determined. Eye-tracking module 118 may determineeye position using measurements from different imaging devices or othersensors. For example, as described above, eye-tracking module 118 mayuse measurements from a slow eye-tracking system to determine areference eye position, and then determine updated positions relative tothe reference eye position from a fast eye-tracking system until a nextreference eye position is determined based on measurements from the sloweye-tracking system.

Eye-tracking module 118 may also determine eye calibration parameters toimprove precision and accuracy of eye tracking. Eye calibrationparameters may include parameters that may change whenever a user donsor adjusts near-eye display 120. Example eye calibration parameters mayinclude an estimated distance between a component of eye-tracking unit130 and one or more parts of the eye, such as the eye's center, pupil,cornea boundary, or a point on the surface of the eye. Other example eyecalibration parameters may be specific to a particular user and mayinclude an estimated average eye radius, an average corneal radius, anaverage sclera radius, a map of features on the eye surface, and anestimated eye surface contour. In embodiments where light from theoutside of near-eye display 120 may reach the eye (as in some augmentedreality applications), the calibration parameters may include correctionfactors for intensity and color balance due to variations in light fromthe outside of near-eye display 120.

Eye-tracking module 118 may use eye calibration parameters to determinewhether the measurements captured by eye-tracking unit 130 would alloweye-tracking module 118 to determine an accurate eye position (alsoreferred to herein as “valid measurements”). Invalid measurements, fromwhich eye-tracking module 118 may not be able to determine an accurateeye position, may be caused by the user blinking, adjusting the headset,or removing the headset, and/or may be caused by near-eye display 120experiencing greater than a threshold change in illumination due toexternal light.

FIG. 2 is a perspective view of a simplified example near-eye display200 including various sensors. Near-eye display 200 may be a specificimplementation of near-eye display 120 of FIG. 1, and may be configuredto operate as a virtual reality display, an augmented reality display,and/or a mixed reality display. Near-eye display 200 may include a frame205 and a display 210. Display 210 may be configured to present contentto a user. In some embodiments, display 210 may include displayelectronics and/or display optics. For example, as described above withrespect to near-eye display 120 of FIG. 1, display 210 may include anLCD display panel, an LED display panel, or an optical display panel(e.g., a waveguide display assembly).

Near-eye display 200 may further include various sensors 250 a, 250 b,250 c, 250 d, and 250 e on or within frame 205. In some embodiments,sensors 250 a-250 e may include one or more depth sensors, motionsensors, position sensors, inertial sensors, or ambient light sensors.In some embodiments, sensors 250 a-250 e may include one or more imagesensors configured to generate image data representing different fieldsof views in different directions. In some embodiments, sensors 250 a-250e may be used as input devices to control or influence the displayedcontent of near-eye display 200, and/or to provide an interactiveVR/AR/MR experience to a user of near-eye display 200. In someembodiments, sensors 250 a-250 e may also be used for stereoscopicimaging.

In some embodiments, near-eye display 200 may further include one ormore illuminators 230 to project light into the physical environment.The projected light may be associated with different frequency bands(e.g., visible light, infra-red light, ultra-violet light, etc.), andmay serve various purposes. For example, illuminator(s) 230 may projectlight in a dark environment (or in an environment with low intensity ofinfra-red light, ultra-violet light, etc.) to assist sensors 250 a-250 ein capturing images of different objects within the dark environment. Insome embodiments, illuminator(s) 230 may be used to project certainlight pattern onto the objects within the environment. In someembodiments, illuminator(s) 230 may be used as locators, such aslocators 126 described above with respect to FIG. 1.

In some embodiments, near-eye display 200 may also include ahigh-resolution camera 240. Camera 240 may capture images of thephysical environment in the field of view. The captured images may beprocessed, for example, by a virtual reality engine (e.g., virtualreality engine 116 of FIG. 1) to add virtual objects to the capturedimages or modify physical objects in the captured images, and theprocessed images may be displayed to the user by display 210 for AR orMR applications.

Embodiments of the invention may include or be implemented inconjunction with an artificial reality system. Artificial reality is aform of reality that has been adjusted in some manner beforepresentation to a user, which may include, e.g., a virtual reality (VR),an augmented reality (AR), a mixed reality (MR), a hybrid reality, orsome combination and/or derivatives thereof. Artificial reality contentmay include completely generated content or generated content combinedwith captured (e.g., real-world) content. The artificial reality contentmay include video, audio, haptic feedback, or some combination thereof,and any of which may be presented in a single channel or in multiplechannels (such as stereo video that produces a three-dimensional effectto the viewer). Additionally, in some embodiments, artificial realitymay also be associated with applications, products, accessories,services, or some combination thereof, that are used to, e.g., createcontent in an artificial reality and/or are otherwise used in (e.g.,perform activities in) an artificial reality. The artificial realitysystem that provides the artificial reality content may be implementedon various platforms, including a head-mounted display (HMD) connectedto a host computer system, a standalone HMD, a mobile device orcomputing system, or any other hardware platform capable of providingartificial reality content to one or more viewers.

FIG. 3 is a perspective view of an example near-eye display in the formof a head-mounted display (HMD) device 300 for implementing some of theexample near-eye displays (e.g., near-eye display 120) disclosed herein.HMD device 300 may be a part of, e.g., a virtual reality (VR) system, anaugmented reality (AR) system, a mixed reality (MR) system, or somecombinations thereof. HMD device 300 may include a body 320 and a headstrap 330. FIG. 3 shows a top side 323, a front side 325, and a rightside 327 of body 320 in the perspective view. Head strap 330 may have anadjustable or extendible length. There may be a sufficient space betweenbody 320 and head strap 330 of HMD device 300 for allowing a user tomount HMD device 300 onto the user's head. In various embodiments, HMDdevice 300 may include additional, fewer, or different components. Forexample, in some embodiments, HMD device 300 may include eyeglasstemples and temples tips, rather than head strap 330.

HMD device 300 may present to a user media including virtual and/oraugmented views of a physical, real-world environment withcomputer-generated elements. Examples of the media presented by HMDdevice 300 may include images (e.g., two-dimensional (2D) orthree-dimensional (3D) images), videos (e.g., 2D or 3D videos), audios,or some combinations thereof. The images and videos may be presented toeach eye of the user by one or more display assemblies (not shown inFIG. 3) enclosed in body 320 of HMD device 300. In various embodiments,the one or more display assemblies may include a single electronicdisplay panel or multiple electronic display panels (e.g., one displaypanel for each eye of the user). Examples of the electronic displaypanel(s) may include, for example, a liquid crystal display (LCD), anorganic light emitting diode (OLED) display, an inorganic light emittingdiode (ILED) display, a micro-LED display, an active-matrix organiclight emitting diode (AMOLED) display, a transparent organic lightemitting diode (TOLED) display, some other display, or some combinationsthereof. HMD device 300 may include two eye box regions.

In some implementations, HMD device 300 may include various sensors (notshown), such as depth sensors, motion sensors, position sensors, and eyetracking sensors. Some of these sensors may use a structured lightpattern for sensing. In some implementations, HMD device 300 may includean input/output interface for communicating with a console. In someimplementations, HMD device 300 may include a virtual reality engine(not shown) that can execute applications within HMD device 300 andreceive depth information, position information, accelerationinformation, velocity information, predicted future positions, or somecombination thereof of HMD device 300 from the various sensors. In someimplementations, the information received by the virtual reality enginemay be used for producing a signal (e.g., display instructions) to theone or more display assemblies. In some implementations, HMD device 300may include locators (not shown, such as locators 126) located in fixedpositions on body 320 relative to one another and relative to areference point. Each of the locators may emit light that is detectableby an external imaging device.

FIG. 4 is a simplified block diagram of an example electronic system 400of an example near-eye display (e.g., HMD device) for implementing someof the examples disclosed herein. Electronic system 400 may be used asthe electronic system of HMD device 1000 or other near-eye displaysdescribed above. In this example, electronic system 400 may include oneor more processor(s) 410 and a memory 420. Processor(s) 410 may beconfigured to execute instructions for performing operations at a numberof components, and can be, for example, a general-purpose processor ormicroprocessor suitable for implementation within a portable electronicdevice. Processor(s) 410 may be communicatively coupled with a pluralityof components within electronic system 400. To realize thiscommunicative coupling, processor(s) 410 may communicate with the otherillustrated components across a bus 440. Bus 440 may be any subsystemadapted to transfer data within electronic system 400. Bus 440 mayinclude a plurality of computer buses and additional circuitry totransfer data.

Memory 420 may be coupled to processor(s) 410. In some embodiments,memory 420 may offer both short-term and long-term storage and may bedivided into several units. Memory 420 may be volatile, such as staticrandom access memory (SRAM) and/or dynamic random access memory (DRAM)and/or non-volatile, such as read-only memory (ROM), flash memory, andthe like. Furthermore, memory 420 may include removable storage devices,such as secure digital (SD) cards. Memory 420 may provide storage ofcomputer-readable instructions, data structures, program modules, andother data for electronic system 400. In some embodiments, memory 420may be distributed into different hardware modules. A set ofinstructions and/or code might be stored on memory 420. The instructionsmight take the form of executable code that may be executable byelectronic system 400, and/or might take the form of source and/orinstallable code, which, upon compilation and/or installation onelectronic system 400 (e.g., using any of a variety of generallyavailable compilers, installation programs, compression/decompressionutilities, etc.), may take the form of executable code.

In some embodiments, memory 420 may store a plurality of applicationmodules 422 through 424, which may include any number of applications.Examples of applications may include gaming applications, conferencingapplications, video playback applications, or other suitableapplications. The applications may include a depth sensing function oreye tracking function. Application modules 422-424 may includeparticular instructions to be executed by processor(s) 410. In someembodiments, certain applications or parts of application modules422-424 may be executable by other hardware modules 480. In certainembodiments, memory 420 may additionally include secure memory, whichmay include additional security controls to prevent copying or otherunauthorized access to secure information.

In some embodiments, memory 420 may include an operating system 425loaded therein. Operating system 425 may be operable to initiate theexecution of the instructions provided by application modules 422-424and/or manage other hardware modules 480 as well as interfaces with awireless communication subsystem 430 which may include one or morewireless transceivers. Operating system 425 may be adapted to performother operations across the components of electronic system 400including threading, resource management, data storage control and othersimilar functionality.

Wireless communication subsystem 430 may include, for example, aninfrared communication device, a wireless communication device and/orchipset (such as a Bluetooth® device, an IEEE 802.11 device, a Wi-Fidevice, a WiMax device, cellular communication facilities, etc.), and/orsimilar communication interfaces. Electronic system 400 may include oneor more antennas 434 for wireless communication as part of wirelesscommunication subsystem 430 or as a separate component coupled to anyportion of the system. Depending on desired functionality, wirelesscommunication subsystem 430 may include separate transceivers tocommunicate with base transceiver stations and other wireless devicesand access points, which may include communicating with different datanetworks and/or network types, such as wireless wide-area networks(WWANs), wireless local area networks (WLANs), or wireless personal areanetworks (WPANs). A WWAN may be, for example, a WiMax (IEEE 802.16)network. A WLAN may be, for example, an IEEE 802.11x network. A WPAN maybe, for example, a Bluetooth network, an IEEE 802.15x, or some othertypes of network. The techniques described herein may also be used forany combination of WWAN, WLAN, and/or WPAN. Wireless communicationssubsystem 430 may permit data to be exchanged with a network, othercomputer systems, and/or any other devices described herein. Wirelesscommunication subsystem 430 may include a means for transmitting orreceiving data, such as identifiers of HMD devices, position data, ageographic map, a heat map, photos, or videos, using antenna(s) 434 andwireless link(s) 432. Wireless communication subsystem 430, processor(s)410, and memory 420 may together comprise at least a part of one or moreof a means for performing some functions disclosed herein.

Embodiments of electronic system 400 may also include one or moresensors 490. Sensor(s) 490 may include, for example, an image sensor, anaccelerometer, a pressure sensor, a temperature sensor, a proximitysensor, a magnetometer, a gyroscope, an inertial sensor (e.g., a modulethat combines an accelerometer and a gyroscope), an ambient lightsensor, or any other similar module operable to provide sensory outputand/or receive sensory input, such as a depth sensor or a positionsensor. For example, in some implementations, sensor(s) 490 may includeone or more inertial measurement units (IMUs) and/or one or moreposition sensors. An IMU may generate calibration data indicating anestimated position of the HMD device relative to an initial position ofthe HMD device, based on measurement signals received from one or moreof the position sensors. A position sensor may generate one or moremeasurement signals in response to motion of the HMD device. Examples ofthe position sensors may include, but are not limited to, one or moreaccelerometers, one or more gyroscopes, one or more magnetometers,another suitable type of sensor that detects motion, a type of sensorused for error correction of the IMU, or some combination thereof. Theposition sensors may be located external to the IMU, internal to theIMU, or some combination thereof. At least some sensors may use astructured light pattern for sensing.

Electronic system 400 may include a display module 460. Display module460 may be a near-eye display, and may graphically present information,such as images, videos, and various instructions, from electronic system400 to a user. Such information may be derived from one or moreapplication modules 422-424, virtual reality engine 426, one or moreother hardware modules 480, a combination thereof, or any other suitablemeans for resolving graphical content for the user (e.g., by operatingsystem 425). Display module 460 may use liquid crystal display (LCD)technology, light-emitting diode (LED) technology (including, forexample, OLED, ILED, mLED, AMOLED, TOLED, etc.), light emitting polymerdisplay (LPD) technology, or some other display technology.

Electronic system 400 may include a user input/output module 470. Userinput/output module 470 may allow a user to send action requests toelectronic system 400. An action request may be a request to perform aparticular action. For example, an action request may be to start or endan application or to perform a particular action within the application.User input/output module 470 may include one or more input devices.Example input devices may include a touchscreen, a touch pad,microphone(s), button(s), dial(s), switch(es), a keyboard, a mouse, agame controller, or any other suitable device for receiving actionrequests and communicating the received action requests to electronicsystem 400. In some embodiments, user input/output module 470 mayprovide haptic feedback to the user in accordance with instructionsreceived from electronic system 400. For example, the haptic feedbackmay be provided when an action request is received or has beenperformed.

Electronic system 400 may include a camera 450 that may be used to takephotos or videos of a user, for example, for tracking the user's eyeposition. Camera 450 may also be used to take photos or videos of theenvironment, for example, for VR, AR, or MR applications. Camera 450 mayinclude, for example, a complementary metal-oxide-semiconductor (CMOS)image sensor with a few millions or tens of millions of pixels. In someimplementations, camera 450 may include two or more cameras that may beused to capture 3-D images.

In some embodiments, electronic system 400 may include a plurality ofother hardware modules 480. Each of other hardware modules 480 may be aphysical module within electronic system 400. While each of otherhardware modules 480 may be permanently configured as a structure, someof other hardware modules 480 may be temporarily configured to performspecific functions or temporarily activated. Examples of other hardwaremodules 480 may include, for example, an audio output and/or inputmodule (e.g., a microphone or speaker), a near field communication (NFC)module, a rechargeable battery, a battery management system, awired/wireless battery charging system, etc. In some embodiments, one ormore functions of other hardware modules 480 may be implemented insoftware.

In some embodiments, memory 420 of electronic system 400 may also storea virtual reality engine 426. Virtual reality engine 426 may executeapplications within electronic system 400 and receive positioninformation, acceleration information, velocity information, predictedfuture positions, or some combination thereof of the HMD device from thevarious sensors. In some embodiments, the information received byvirtual reality engine 426 may be used for producing a signal (e.g.,display instructions) to display module 460. For example, if thereceived information indicates that the user has looked to the left,virtual reality engine 426 may generate content for the HMD device thatmirrors the user's movement in a virtual environment. Additionally,virtual reality engine 426 may perform an action within an applicationin response to an action request received from user input/output module470 and provide feedback to the user. The provided feedback may bevisual, audible, or haptic feedback. In some implementations,processor(s) 410 may include one or more GPUs that may execute virtualreality engine 426.

In various implementations, the above-described hardware and modules maybe implemented on a single device or on multiple devices that cancommunicate with one another using wired or wireless connections. Forexample, in some implementations, some components or modules, such asGPUs, virtual reality engine 426, and applications (e.g., trackingapplication), may be implemented on a console separate from thehead-mounted display device. In some implementations, one console may beconnected to or support more than one HMD.

In alternative configurations, different and/or additional componentsmay be included in electronic system 400. Similarly, functionality ofone or more of the components can be distributed among the components ina manner different from the manner described above. For example, in someembodiments, electronic system 400 may be modified to include othersystem environments, such as an AR system environment and/or an MRenvironment.

As discussed above, LEDs may be used as light sources in various partsof an artificial reality system, such as the display electronics 122,the locators 126, and the eye tracking unit 130. Further, LEDs may beused in various display technologies, such as heads-up displays,television displays, smartphone displays, watch displays, wearabledisplays, and flexible displays. LEDs can be used in combination with aplurality of sensors in many applications such as the Internet of Things(IOT). The LEDs described herein can be configured to emit light havingany desired wavelength, such as ultraviolet, visible, or infrared light.Also, the LEDs described herein can be configured to have any suitablemesa shape, such as planar, vertical, conical, semi-parabolic,parabolic, or combinations thereof. The LEDs described herein may bemicro-LEDs that have an active light emitting area with a lineardimension that is less than 50 μm, less than 20 μm, or less than 10 μm.For example, the linear dimension may be as small as 2 μm or 4 μm.

FIGS. 5A-5F illustrate a method of wafer-to-wafer bonding formanufacturing LEDs. As shown in FIG. 5A, the method begins with astructure having a substrate 515 and a semiconductor material 501.Semiconductor material 501 may include a plurality of epitaxial layersthat are grown by any suitable epitaxial method on substrate 515. Forexample, semiconductor material 501 may include an n-type layer 525, aquantum well layer 530, and a p-type layer 535. Substrate 515 may bemade of any material that is suitable for growing semiconductor material501. For example, substrate 515 may be made of sapphire, andsemiconductor material 501 may be made of GaN. Other layers may also beincluded, such as a buffer layer between substrate 515 and n-type layer525. The buffer layer may be made of any suitable material, such aspolycrystalline GaN or AlN, and may have a thickness of less than 50 nm.

As shown in FIG. 5B, a contact layer 540 may be deposited on p-typelayer 535 of semiconductor material 501. Contact layer 540 may be madeof any suitable material for providing an electrical contact tosemiconductor material 501, such as a metal. Further, contact layer 540may be optimized to have a high reflectivity. A bonding layer 545 may bedeposited on contact layer 540. Bonding layer 545 may be made of anysuitable material for providing a bond to semiconductor material 501,such as a metal. Contact layer 540 and bonding layer 545 may be made ofdifferent materials or the same material. Contact layer 540 and bondinglayer 545 may be included in a single layer that is deposited on p-typelayer 535, or they may be separate layers as shown in FIG. 5B.

As shown in FIG. 5C, another structure including a base wafer 505 and abonding layer 510 may be provided. Base wafer 505 may be anApplication-Specific Integrated Circuit (ASIC) wafer, and may include aplurality of driver circuits 580. Bonding layer 510 may be made of anysuitable material for providing a bond to base wafer 505, such as ametal.

As shown in FIG. 5D, base wafer 505 may be bonded to semiconductormaterial 501 via bonding layer 510 and/or bonding layer 545. Bondinglayer 510 and bonding layer 545 may be made of the same material. Thisexample is shown in FIG. 5D, in which the combination of bonding layer510 and bonding layer 545 is shown as bonding layer 550. Alternatively,bonding layer 510 and bonding layer 545 may be made of differentmaterials. Base wafer 505 may be bonded to semiconductor material 501 byvarious methods, as discussed in further detail below.

As shown in FIG. 5E, substrate 515 may be removed from semiconductormaterial 501. Substrate 515 may be removed by any suitable method, suchas laser lift-off (LLO). For example, substrate 515 may be removed byfocusing a laser beam at an interface between substrate 515 andsemiconductor material 501. Alternatively or in addition, substrate 515may be removed by heating substrate 515 and/or applying a horizontalforce to substrate 515.

As shown in FIG. 5F, trenches 570 may be formed through semiconductormaterial 501, contact layer 540, bonding layer 550, and part of basewafer 505. Trenches 570 may be formed by any suitable method, such aslithography. The pattern of trenches 570 may be based on the locationsof driver circuits 580, such that trenches 570 do not interfere withdriver circuits 580 and are not vertically aligned with driver circuits580. The resulting structure includes a plurality of LEDs that areseparated by trenches 570. As shown in FIG. 5F, the LEDs may havevertical side walls. For example, the LEDs may have cylindrically shapedmesas.

FIGS. 6A-6I illustrate another method of wafer-to-wafer bonding formanufacturing LEDs. As shown in FIG. 6A, the method begins with astructure having a substrate 615 and a semiconductor material 601.Semiconductor material 601 may include a plurality of epitaxial layersthat are grown by any suitable epitaxial method on substrate 615. Forexample, semiconductor material 601 may include an n-type layer 625, aquantum well layer 630, and a p-type layer 635. Substrate 615 may bemade of any material that is suitable for growing semiconductor material601. For example, substrate 615 may be made of sapphire, andsemiconductor material 601 may be made of GaN. Other layers may also beincluded, such as a buffer layer between substrate 615 and n-type layer625. The buffer layer may be made of any suitable material, such aspolycrystalline GaN or AlN, and may have a thickness of less than 50 nm.

As shown in FIG. 6B, a plurality of adjacent mesa shapes 690 may beformed by patterning a plurality of gaps 650 in semiconductor material601. The patterning may be performed by any suitable method, such asanisotropic etching. The shape of mesa shapes 690 may be chosen toincrease or optimize the amount of light that is extracted fromcorresponding LEDs once fabrication of the LEDs is complete. Forexample, mesa shapes 690 may be formed to have a parabolic shape oranother non-vertical shape. A reflective layer 655 may be formed on atleast one side wall of each mesa shape 690. Reflective layer 655 may bemade of any suitable material, such as silver or gold. Reflective layer655 may be formed by any suitable method, such as evaporation orsputtering.

As shown in FIG. 6C, a passivation layer 660 may be formed within gaps650 between adjacent mesa shapes 690. Passivation layer 660 may be madeof any suitable material, such as an oxide. Passivation layer 660 may beused to provide a flat bonding surface. For example, after passivationlayer 660 has been deposited within gaps 650, the passivation layer 660may be polished back to be flat and to expose the p-type layer 635.Alternatively, a thin layer of passivation layer 660 and p-type layer635 may be removed to form the flat bonding surface. In otherembodiments, grinding and/or chemical etching may be used to form theflat bonding surface. Alternatively or in addition, any other suitablemethod may be used to planarize passivation layer 660 and p-type layer635.

As shown in FIG. 6D, a contact layer 640 may be deposited on p-typelayer 635 of semiconductor material 601 and passivation layer 660.Contact layer 640 may be made of any suitable material for providing anelectrical contact to semiconductor material 601, such as a metal.Further, contact layer 640 may be optimized to have a high reflectivity.As an alternative the contact layer 640 may be deposited prior to theformation of mesa shapes 690. In this example, the passivation layer 660may be polished back to be flat and to expose the contact layer 640. Abonding layer 645 may be deposited on contact layer 640. Bonding layer645 may be made of any suitable material for providing a bond tosemiconductor material 601, such as a metal. Contact layer 640 andbonding layer 645 may be made of different materials or the samematerial. Contact layer 640 and bonding layer 645 may be included in asingle layer that is deposited on p-type layer 635 and passivation layer660, or they may be separate layers as shown in FIG. 6D.

As shown in FIG. 6E, another structure including a base wafer 605 and abonding layer 610 may be provided. Base wafer 605 may be an ASIC wafer,and may include a plurality of driver circuits 680. Bonding layer 610may be made of any suitable material for providing a bond to base wafer605, such as a metal.

As shown in FIG. 6F, base wafer 605 may be bonded to semiconductormaterial 601 via bonding layer 610 and/or bonding layer 645. Bondinglayer 610 and bonding layer 645 may be made of the same material. Thisexample is shown in FIG. 6F, in which the combination of bonding layer610 and bonding layer 645 is shown as bonding layer 695. Alternatively,bonding layer 610 and bonding layer 645 may be made of differentmaterials. Base wafer 605 may be bonded to semiconductor material 601 byvarious methods, as discussed in further detail below. During bonding,base wafer 605 may be aligned with semiconductor material 601 such thatdriver circuits 680 are aligned with adjacent mesa shapes 690.

As shown in FIG. 6G, substrate 615 may be removed from semiconductormaterial 601. Substrate 615 may be removed by any suitable method, suchas laser lift-off (LLO). For example, substrate 615 may be removed byfocusing a laser beam at an interface between substrate 615 andsemiconductor material 601. Alternatively or in addition, substrate 615may be removed by heating substrate 615 and/or applying a horizontalforce to substrate 615.

As shown in FIG. 6H, trenches 670 may be formed through semiconductormaterial 601, contact layer 640, and bonding layer 695. Trenches 670 maybe formed by any suitable method, such as lithography. Trenches 670 maybe used to singulate LEDs, and may be formed such that trenches 670 donot interfere with driver circuits 680 and are not vertically alignedwith driver circuits 680. The resulting structure includes a pluralityof LEDs that are separated by trenches 670. As shown in FIG. 6H, theLEDs may have non-vertical side walls.

As shown in FIG. 6I, a lens 675 may be formed at a light exit surface ofeach LED. Lens 675 may increase the light extraction efficiency anddecrease the emission cone of the LED. For example, the light extractionefficiency of each LED shown in FIG. 6I may be at least 85% and the beamangle may be less than 40°. Alternatively, other light extractionfeatures may be formed at the light exit surface of each LED, such asroughening of the light exit surface. Some examples of other lightextraction features include graded index optics, Fresnel lenses,diffractive gratings, photonic crystals, and anti-reflection (AR)coatings. Alternatively other features may be formed to increase thespontaneous emission rate.

FIG. 6J shows an example of a 2T1C pixel structure that may be used inthe base wafer 605. The 2T1C pixel structure may include two transistorsM1 and M2, along with a capacitor C1. The 2T1C pixel structure is anexample of the driver circuit 680.

FIGS. 7A-7F illustrate yet another method of wafer-to-wafer bonding formanufacturing LEDs. As shown in FIG. 7A, the method begins with astructure having a substrate 715 and a semiconductor material 701.Semiconductor material 701 may include a plurality of epitaxial layersthat are grown by any suitable epitaxial method on substrate 715. Forexample, semiconductor material 701 may include an n-type layer 725, aquantum well layer 730, and a p-type layer 735. Substrate 715 may bemade of any material that is suitable for growing semiconductor material701. For example, substrate 715 may be made of sapphire, andsemiconductor material 701 may be made of GaN. Other layers may also beincluded, such as a buffer layer 720 between substrate 715 and n-typelayer 725. Buffer layer 720 may be made of any suitable material, suchas polycrystalline GaN or AlN, and may have a thickness of less than 50nm.

As shown in FIG. 7B, a plurality of high resistivity areas alternatingwith a plurality of low resistivity areas may be formed by patterning ofp-type layer 735 of semiconductor material 701. The high resistivityareas have a higher resistivity than the low resistivity areas. Oncep-type layer 735 has been patterned, p-type layer 735 includes aplurality of light emitters 790 (corresponding to the low resistivityareas) that alternate with a plurality of high resistivity areas 780.The patterning may be performed by any suitable method, such as plasmatreatment or ion implantation. For example, lithography may be used totreat selected areas of p-type layer 735 with plasma in order toincrease the resistivity in those areas. The depth of the treatment mayextend through the entire p-layer 735, and may not extend into quantumwell layer 730. The light emitters 790 may be designed to increase thelight extraction of the structure by aligning the light emitters 790with the light extraction features discussed above. The p-type layer 735may be polished back to be flat in order to provide a flat bondingsurface. Alternatively, a thin slice of p-type layer 735 may be removedto form the flat bonding surface. In other embodiments, grinding and/orchemical etching may be used to form the flat bonding surface.Alternatively or in addition, any other suitable method may be used toplanarize p-type layer 735. Arrows 795 represent current flow, and showthat current does not flow between adjacent light emitters 790.

As shown in FIG. 7C, a contact layer 740 may be deposited on p-typelayer 735 of semiconductor material 701. Contact layer 740 may be madeof any suitable material for providing an electrical contact tosemiconductor material 701, such as a metal. As an alternative contactlayer 740 may be deposited prior to the formation of light emitters 790.Further, contact layer 740 may be optimized to have a high reflectivity.A bonding layer 745 may be deposited on contact layer 740. Bonding layer745 may be made of any suitable material for providing a bond tosemiconductor material 701, such as a metal. Contact layer 740 andbonding layer 745 may be made of different materials or the samematerial. Contact layer 740 and bonding layer 745 may be included in asingle layer that is deposited on p-type layer 735, or they may beseparate layers as shown in FIG. 7C.

As shown in FIG. 7D, a base wafer 705 may be bonded to semiconductormaterial 701 via bonding layer 750. Base wafer 705 may be an ASIC wafer,and may include a plurality of driver circuits 785. Bonding layer 745and bonding layer 750 may be made of the same material. Bonding layer750 may include bonding layer 745. Base wafer 705 may be bonded tosemiconductor material 701 by various methods, as discussed in furtherdetail below. During bonding, base wafer 705 may be aligned withsemiconductor material 701 such that driver circuits 785 are alignedwith adjacent light emitters 790.

As shown in FIG. 7E, substrate 715 may be removed from semiconductormaterial 701. Substrate 715 may be removed by any suitable method, suchas laser lift-off (LLO). For example, substrate 715 may be removed byfocusing a laser beam at an interface between substrate 715 andsemiconductor material 701. Alternatively or in addition, substrate 715may be removed by heating substrate 715 and/or applying a horizontalforce to substrate 715.

As shown in FIG. 7F, trenches 770 may be formed through semiconductormaterial 701, contact layer 740, bonding layer 750, and base wafer 705in order to singulate the LEDs. Alternatively, trenches 770 may beformed partially through base wafer 705 in order to singulate the LEDs.As another alternative, base wafer 705 may be partially etched todetermine the LED array size and etched all the way through in order toisolate each LED array. Trenches 770 may be formed between adjacentlight emitters 790 such that individual LEDs are formed. Trenches 770may be formed by any suitable method, such as lithography. The resultingstructure includes a plurality of LEDs that are separated by trenches770. As shown in FIG. 7F, the LEDs may have vertical side walls.

As shown in FIG. 7G, a lens 775 may be formed at a light exit surface ofeach LED. Lens 775 may increase the light extraction efficiency anddecrease the emission cone of the LED. Alternatively, other lightextraction features may be formed at the light exit surface of each LED,such as roughening of the light exit surface. Some examples of otherlight extraction features include graded index optics, Fresnel lenses,diffraction gratings, and anti-reflection (AR) coatings. Alternativelyother features may be formed to increase the spontaneous emission rate,such as photonic crystals or an optical antenna.

FIGS. 8A-8C illustrate various methods of bonding a base wafer to asemiconductor wafer. As shown in FIG. 8A, a structure for metal-to-metalbonding may include a substrate 815 and a semiconductor material 801.Semiconductor material 801 may include a plurality of epitaxial layersthat are grown by any suitable epitaxial method on substrate 815. Forexample, semiconductor material 801 may include an n-type layer 825, aquantum well layer 830, and a p-type layer 835. Substrate 815 may bemade of any material that is suitable for growing semiconductor material801. For example, substrate 815 may be made of sapphire, andsemiconductor material 801 may be made of GaN. Other layers may also beincluded, such as a buffer layer 820 between substrate 815 and n-typelayer 825. Buffer layer 820 may be made of any suitable material, suchas polycrystalline GaN or AlN, and may have a thickness of less than 50nm.

A plurality of high resistivity areas alternating with a plurality oflow resistivity areas may be formed by patterning of p-type layer 835 ofsemiconductor material 801. The high resistivity areas may have a higherresistivity than the low resistivity areas. Once p-type layer 835 havebeen patterned, p-type layer 835 includes a plurality of light emitters890 (corresponding to the low resistivity areas) that alternate with aplurality of high resistivity areas 880. The patterning may be performedby any suitable method, such as plasma treatment or ion implantation.For example, lithography may be used to treat selected areas of p-typelayer 835 with plasma in order to increase the resistivity in thoseareas. The depth of the treatment may extend through the entire p-typelayer 835, and may not extend into quantum well layer 830. The p-typelayer 835 may be polished back to be flat in order to provide a flatbonding surface. Alternatively, a thin slice of p-type layer 835 may beremoved to form the flat bonding surface. In other embodiments, grindingand/or chemical etching may be used to form the flat bonding surface.Alternatively or in addition, any other suitable method may be used toplanarize p-type layer 835.

A contact layer 840 may be deposited on p-type layer 835 ofsemiconductor material 801. Contact layer 840 may be made of anysuitable material for providing an electrical contact to semiconductormaterial 801, such as a metal. Further, contact layer 840 may beoptimized to have a high reflectivity. A bonding layer 845 may bedeposited on contact layer 840. Bonding layer 845 may be made of anysuitable material for providing a bond to semiconductor material 801,such as a metal. Contact layer 840 and bonding layer 845 may be made ofdifferent materials or the same material. Contact layer 840 and bondinglayer 845 may be included in a single layer that is deposited on p-typelayer 835, or they may be separate layers as shown in FIG. 8A. Bondinglayer 845 may be used for metal-to-metal bonding, and bonding layer 845may be made of Ti or any other suitable metal. Bonding layer 845 may besubstantially flat, such that it sticks together with another metalbonding layer when they are pushed together.

As shown in FIG. 8B, a structure for eutectic bonding may include asubstrate 815 and a semiconductor material 801 that includes an n-typelayer 825, a quantum well layer 830, and a p-type layer 835. Substrate815 may be made of any material that is suitable for growingsemiconductor material 801. For example, substrate 815 may be made ofsapphire, and semiconductor material 801 may be made of GaN. Otherlayers may also be included, such as a buffer layer 820 betweensubstrate 815 and n-type layer 825. Buffer layer 820 may be made of anysuitable material, such as polycrystalline GaN or AlN, and may have athickness of less than 50 nm. A plurality of high resistivity areasalternating with a plurality of low resistivity areas may be formed bypatterning of p-type layer 835 of semiconductor material 801. The highresistivity areas may have a higher resistivity than the low resistivityareas. Once p-type layer 835 has been patterned, p-type layer 835includes a plurality of light emitters 890 (corresponding to the lowresistivity areas) that alternate with a plurality of high resistivityareas 880. The patterning may be performed by any suitable method, suchas plasma treatment or ion implantation. For example, lithography may beused to treat selected areas of p-type layer 835 with plasma in order toincrease the resistivity in those areas. The depth of the treatment mayextend through the entire p-type layer 835, and may not extend intoquantum well layer 830. The p-type layer 835 may be polished back to beflat in order to provide a flat bonding surface. Alternatively, a thinslice of p-type layer 835 may be removed to form the flat bondingsurface. In other embodiments, grinding and/or chemical etching may beused to form the flat bonding surface. Alternatively or in addition, anyother suitable method may be used to planarize p-type layer 835. Aeutectic bonding layer 885 may be deposited on p-type layer 835 ofsemiconductor material 801. Eutectic bonding layer 885 may be made ofany suitable material for providing a eutectic bond to semiconductormaterial 801, such as CuSn or AuTi. Eutectic bonding layer 885 need notbe substantially flat, because it will stick together with another metalbonding layer when they are heated and pushed together.

As shown in FIG. 8C, a structure for metal oxide bonding may include asubstrate 815 and a semiconductor material 801 that includes an n-typelayer 825, a quantum well layer 830, and a p-type layer 835. Substrate815 may be made of any material that is suitable for growingsemiconductor material 801. For example, substrate 815 may be made ofsapphire, and semiconductor material 801 may be made of GaN. Otherlayers may also be included, such as a buffer layer 820 betweensubstrate 815 and n-type layer 825. Buffer layer 820 may be made of anysuitable material, such as polycrystalline GaN or AlN, and may have athickness of less than 50 nm. A plurality of high resistivity areasalternating with a plurality of low resistivity areas may be formed bypatterning of p-type layer 835 of semiconductor material 801. The highresistivity areas may have a higher resistivity than the low resistivityareas. Once p-type layer 835 has been patterned, p-type layer 835includes a plurality of light emitters 890 (corresponding to the lowresistivity areas) that alternate with a plurality of high resistivityareas 880. The patterning may be performed by any suitable method, suchas plasma treatment or ion implantation. For example, lithography may beused to treat selected areas of p-type layer 835 with plasma in order toincrease the resistivity in those areas. The depth of the treatment mayextend through the entire p-type layer 835, and may not extend intoquantum well layer 830. The p-type layer 835 may be polished back inorder to provide a flat bonding surface. Alternatively, a thin slice ofp-type layer 835 may be removed to form the flat bonding surface. Inother embodiments, grinding and/or chemical etching may be used to formthe flat bonding surface. Alternatively or in addition, any othersuitable method may be used to planarize p-type layer 835.

A metal layer 895 may be formed on each of the light emitters 890. Themetal layer 895 may be the contact for the LED device. High resistivityareas 880 may act as the oxide layer for bonding to another substrate.Alternatively, an oxide layer 899 may be formed on each of the highresistivity areas 880. Metal layer 895 may also be used to bond withanother bonding layer. The high resistivity areas 880 or the oxide layer899 may be used to create an initial bond with another substrate thatalso has an alternating pattern of oxide and metal areas. The substratesare aligned and an oxide-oxide bond is formed. The oxide-oxide bond maybe formed at room temperature. Metal layer 895 may then be used tocreate a second bond to provide electrical connection and to enhance thestrength of the first bond. The metal-metal bond may be formed byheating the substrates to close a gap between the metal areas of the twosubstrates, thereby creating a conductive path. The bonded substratesmay then be further heated to compress the metal areas without applyingexternal pressure.

Alternatively or in addition, various other bonding methods may be used.For example, anodic bonding, thermocompression bonding, ultraviolet (UV)bonding, and/or fusion bonding may be used. Further, a two-step bondingprocess may be used, in which an initial bond having moderate strengthis created, and the initial bond is then enhanced after a substrate isremoved and before the LEDs are singulated.

FIGS. 9A-9D illustrate a method of forming a surface for wafer-to-waferbonding. As shown in FIG. 9A, a structure for wafer-to-wafer bonding mayinclude a substrate 915 and a semiconductor material 901. Semiconductormaterial 901 may include a plurality of epitaxial layers that are grownby any suitable epitaxial method on substrate 915. Substrate 915 may bemade of any material that is suitable for growing semiconductor material901. For example, substrate 915 may be made of sapphire, andsemiconductor material 901 may be made of GaN. Other layers may also beincluded, such as those described above.

As shown in FIG. 9B, contacts 940 may be deposited on semiconductormaterial 901. Contacts 940 may be made of any suitable material forproviding an electrical contact to semiconductor material 901, such as ametal. Further, contacts 940 may be optimized to have a highreflectivity.

As shown in FIG. 9C, a passivation layer 960 may be deposited onsemiconductor material 901 and contacts 940. Passivation layer 960 maybe made of any suitable material, such as an oxide.

As shown in FIG. 9D, a portion of passivation layer 960 may be removedin order to provide a surface having contacts 940 and passivation layer960 for bonding. Passivation layer 960 may be used to provide a flatbonding surface. For example, passivation layer 960 may be polished backto be flat and to expose contacts 940. Alternatively, a thin layer ofpassivation layer 960 and contacts 940 may be removed to form the flatbonding surface. In other embodiments, grinding and/or chemical etchingmay be used to form the flat bonding surface. Alternatively or inaddition, any other suitable method may be used to planarize passivationlayer 960 and contacts 940. The flat bonding surface may be used to bondsubstrate 915 to another wafer by metal oxide bonding as describedabove.

The methods, systems, and devices discussed above are examples. Variousembodiments may omit, substitute, or add various procedures orcomponents as appropriate. For instance, in alternative configurations,the methods described may be performed in an order different from thatdescribed, and/or various stages may be added, omitted, and/or combined.Also, features described with respect to certain embodiments may becombined in various other embodiments. Different aspects and elements ofthe embodiments may be combined in a similar manner. Also, technologyevolves and, thus, many of the elements are examples that do not limitthe scope of the disclosure to those specific examples.

Specific details are given in the description to provide a thoroughunderstanding of the embodiments. However, embodiments may be practicedwithout these specific details. For example, well-known circuits,processes, systems, structures, and techniques have been shown withoutunnecessary detail in order to avoid obscuring the embodiments. Thisdescription provides example embodiments only, and is not intended tolimit the scope, applicability, or configuration of the invention.Rather, the preceding description of the embodiments will provide thoseskilled in the art with an enabling description for implementing variousembodiments. Various changes may be made in the function and arrangementof elements without departing from the spirit and scope of the presentdisclosure.

Also, some embodiments were described as processes depicted as flowdiagrams or block diagrams. Although each may describe the operations asa sequential process, many of the operations may be performed inparallel or concurrently. In addition, the order of the operations maybe rearranged. A process may have additional steps not included in thefigure. Furthermore, embodiments of the methods may be implemented byhardware, software, firmware, middleware, microcode, hardwaredescription languages, or any combination thereof. When implemented insoftware, firmware, middleware, or microcode, the program code or codesegments to perform the associated tasks may be stored in acomputer-readable medium such as a storage medium. Processors mayperform the associated tasks.

It will be apparent to those skilled in the art that substantialvariations may be made in accordance with specific requirements. Forexample, customized or special-purpose hardware might also be used,and/or particular elements might be implemented in hardware, software(including portable software, such as applets, etc.), or both. Further,connection to other computing devices such as network input/outputdevices may be employed.

With reference to the appended figures, components that can includememory can include non-transitory machine-readable media. The term“machine-readable medium” and “computer-readable medium,” as usedherein, refer to any storage medium that participates in providing datathat causes a machine to operate in a specific fashion. In embodimentsprovided hereinabove, various machine-readable media might be involvedin providing instructions/code to processing units and/or otherdevice(s) for execution. Additionally or alternatively, themachine-readable media might be used to store and/or carry suchinstructions/code. In many implementations, a computer-readable mediumis a physical and/or tangible storage medium. Such a medium may takemany forms, including, but not limited to, non-volatile media, volatilemedia, and transmission media. Common forms of computer-readable mediainclude, for example, magnetic and/or optical media such as compact disk(CD) or digital versatile disk (DVD), punch cards, paper tape, any otherphysical medium with patterns of holes, a RAM, a programmable read-onlymemory (PROM), an erasable programmable read-only memory (EPROM), aFLASH-EPROM, any other memory chip or cartridge, a carrier wave asdescribed hereinafter, or any other medium from which a computer canread instructions and/or code. A computer program product may includecode and/or machine-executable instructions that may represent aprocedure, a function, a subprogram, a program, a routine, anapplication (App), a subroutine, a module, a software package, a class,or any combination of instructions, data structures, or programstatements.

Those of skill in the art will appreciate that information and signalsused to communicate the messages described herein may be representedusing any of a variety of different technologies and techniques. Forexample, data, instructions, commands, information, signals, bits,symbols, and chips that may be referenced throughout the abovedescription may be represented by voltages, currents, electromagneticwaves, magnetic fields or particles, optical fields or particles, or anycombination thereof.

Terms, “and” and “or” as used herein, may include a variety of meaningsthat are also expected to depend at least in part upon the context inwhich such terms are used. Typically, “or” if used to associate a list,such as A, B, or C, is intended to mean A, B, and C, here used in theinclusive sense, as well as A, B, or C, here used in the exclusivesense. In addition, the term “one or more” as used herein may be used todescribe any feature, structure, or characteristic in the singular ormay be used to describe some combination of features, structures, orcharacteristics. However, it should be noted that this is merely anillustrative example and claimed subject matter is not limited to thisexample. Furthermore, the term “at least one of” if used to associate alist, such as A, B, or C, can be interpreted to mean any combination ofA, B, and/or C, such as A, AB, AC, BC, AA, ABC, AAB, AABBCCC, etc.

Further, while certain embodiments have been described using aparticular combination of hardware and software, it should be recognizedthat other combinations of hardware and software are also possible.Certain embodiments may be implemented only in hardware, or only insoftware, or using combinations thereof. In one example, software may beimplemented with a computer program product containing computer programcode or instructions executable by one or more processors for performingany or all of the steps, operations, or processes described in thisdisclosure, where the computer program may be stored on a non-transitorycomputer readable medium. The various processes described herein can beimplemented on the same processor or different processors in anycombination.

Where devices, systems, components or modules are described as beingconfigured to perform certain operations or functions, suchconfiguration can be accomplished, for example, by designing electroniccircuits to perform the operation, by programming programmableelectronic circuits (such as microprocessors) to perform the operationsuch as by executing computer instructions or code, or processors orcores programmed to execute code or instructions stored on anon-transitory memory medium, or any combination thereof. Processes cancommunicate using a variety of techniques, including, but not limitedto, conventional techniques for inter-process communications, anddifferent pairs of processes may use different techniques, or the samepair of processes may use different techniques at different times.

The specification and drawings are, accordingly, to be regarded in anillustrative rather than a restrictive sense. It will, however, beevident that additions, subtractions, deletions, and other modificationsand changes may be made thereunto without departing from the broaderspirit and scope as set forth in the claims. Thus, although specificembodiments have been described, these are not intended to be limiting.Various modifications and equivalents are within the scope of thefollowing claims.

1. A method comprising: etching a semiconductor material to form aplurality of adjacent mesa shapes, the semiconductor material comprisingone or more epitaxial layers; forming a passivation layer thatcompletely fills gaps between the adjacent mesa shapes; planarizing thepassivation layer, wherein the planarizing exposes a contact layerformed on a first surface of the semiconductor material; and bonding abase wafer to the contact layer.
 2. The method of claim 1, wherein thebonding of the base wafer is performed after the planarizing exposes thecontact layer.
 3. The method of claim 1, further comprising: forming thecontact layer, wherein the forming of the contact layer comprisesdepositing an electrically conductive material onto the first surface ofthe semiconductor material before etching the semiconductor material toform the plurality of adjacent mesa shapes.
 4. The method of claim 1,wherein the planarizing of the passivation layer comprises polishingback the passivation layer to form a flat surface comprising thepassivation layer.
 5. The method of claim 1, wherein planarizing of thepassivation layer comprises grinding or chemically etching thepassivation layer to form a flat surface comprising the passivationlayer.
 6. The method of claim 1, further comprising, before bonding thebase wafer to the contact layer: depositing a bonding layer on thecontact layer, wherein the base wafer is bonded to the contact layer viathe bonding layer.
 7. The method of claim 6, wherein the base wafer isbonded to the bonding layer by metal-to-metal bonding, eutectic bonding,or oxide bonding.
 8. The method of claim 6, wherein the bonding layerand contact layer are made of a same material.
 9. The method of claim 1,further comprising: removing a substrate from a second surface of thesemiconductor material, wherein the second surface of the semiconductormaterial is opposite to the first surface of the semiconductor material;and patterning a trench between each pair of the adjacent mesa shapes toform a plurality of light-emitting diodes after removing the substrate.10. The method of claim 9, wherein the removing of the substrate isperformed after bonding the base wafer to the contact layer.
 11. Themethod of claim 10, wherein the patterning of the trench between eachpair of the adjacent mesa shapes comprises etching through thesemiconductor material, through the contact layer, through the bondinglayer, and at least partially through the base wafer.
 12. The method ofclaim 10, wherein the patterning of the trench between each pair of theadjacent mesa shapes comprises etching the passivation layer such thateach trench extends through a gap that was filled by the passivationlayer.
 13. The method of claim 9, wherein the one or more epitaxiallayers are grown on the substrate, and wherein the etching of thesemiconductor material to form the plurality of adjacent mesa shapes isstopped before reaching the substrate.
 14. The method of claim 9,wherein the base wafer comprises a plurality of driver circuits, andwherein the trenches are not vertically aligned with the plurality ofdriver circuits.
 15. The method of claim 9, wherein the substrate isremoved through applying a focused laser beam or through heating thesubstrate.
 16. The method of claim 9, further comprising forming anoptical element on the second surface of the semiconductor material toenhance a spontaneous emission rate of a first light-emitting diodeamong the plurality of light-emitting diodes, wherein the opticalelement is formed at a light exit surface of the first light-emittingdiode.
 17. The method of claim 16, wherein the optical element comprisesa lens, a graded index element, or a diffraction grating.
 18. The methodof claim 1, wherein the base wafer comprises a plurality of drivercircuits, and wherein the method further comprises aligning theplurality of driver circuits with the adjacent mesa shapes while bondingthe base wafer to the contact layer.
 19. The method of claim 1, whereinthe etching of the semiconductor material to form the plurality ofadjacent mesa shapes produces mesa shapes with non-parallel side walls.20. The method of claim 1, further comprising, before forming thepassivation layer, depositing a reflective layer on a side wall of eachof the adjacent mesa shapes.